This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

ARM Cortex A9 flush cache

I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements.

Is it doable from user mode?

Processor: ARM Cortex A9

OS: Linaro Linux

Parents Reply Children
  • Dear Yasuhiko Koumoto,

    Difference in execution time are huge during consecutive runs (78ms, 52ms,...).

    I believe flushing cache before each run will make it more deterministic.

    I can randomly read/write huge data to clear cache contents. But OS may allocate a region of cache space for this operation and thus not clearing all the data in the cache.

    Alternatively, measuring maximum value of 'n' runs would make sense to worst case execution time.

    I wonder if there is a clean way to bring the execution time more deterministic.

    Update:

    I found GCC function __builtin___clear_cache(); that flushes only the instruction cache.