Hi,
How can I trigger a warm reset on the Cortex-R52?
I found the following description in Arm DynamIQ Shared Unit Technical Reference Manual:
To reset a core and change Execution state from software, a Warm reset request can be made by setting the RR bit of the RMR system register (from AArch32) or the RMR_EL3 register (from AArch64). Following the register write and executing a WFI instruction, the cluster automatically resets the core without requiring any action by the external reset controller. The hardware automatically cleans and invalidates all the caches and safely disconnects the core from cluster before the reset is asserted.
WFI
Does this method also apply to the CR52?
There is an equivalent register in the Armv8-R AArch32/Cortex-R52, the HRMR:
https://developer.arm.com/documentation/100026/0104/System-Control/AArch32-register-descriptions/Hypervisor-Reset-Management-Register
I'm not a Cortex-R52 expert, but looking at the TRM:
https://developer.arm.com/documentation/100026/0104/Clocking-and-Resets/Reset-related-signals?lang=en
It appears that writing the register causes the assertion of a reset request signal. So, it would be up the SoC design what that signal was connected to and what that component did response. Meaning you'll need to check the documentation of the specific SoC you're using..