Hi Experts,
Does the Reset Management Register will be implemented mandatory or optional for the SoC based on ARMv8 and how it is practically used ?
Regards,
Techguyz
If an processor supports both execution states (ie AArch32 and AArch64) then the register is mandatory.
It is used to request a soft reset specifying whether to reset into AArch32 or AArch64. This is the only way to swap EL3 between AArch32/AArch64.
In addition to what Pete said, keep in mind that setting the RMR_ELx.RR bit is only a request for a warm reset, it doesn't actually necessarily do anything by itself. For example, on ARM's Cortex-A57, setting this bit simply asserts the WARMRSTREQ signal. It's then up to the SoC to do something with this, so for example the signal being asserted could cause a power controller to warm reset the core.