We are integrating in an ASIC design an ARM® Cortex® -A53 MPCore Processor rev. r0p4, then we are running VCSpyglass and we are getting some linting errors. I have listed below the most relevant.
ConcatUnsizedNumbers-ML
Module: ca53scu_cpuslv
File: a53x1_CORTEXA53/RTL/ca53scu_cpuslv.v
Line number: 2722
RTL expression: CPU_NUM
Concatenations cannot have unsized number 'CPU_NUM' [Hierarchy: ':xxx...cpuslv.g_reqbuf ']
ImproperRangeIndex-ML
Module:gic500_icb_rd0_ramaccess
File: a53x1_GIC500/RTL/gic500_icb_rd0_ramaccess.v
Line number: 267
RTL expression: [axis_rd0_rd_id_bounded +:4]
SelfAssignment-ML
Module: ca53dpu_dec_late_neon
File: a53x1_CORTEXA53/RTL/ca53dpu_dec_late_neon.v
Line number: 4185
RTL expression: tmp_pipectl[`CA53_FP_PIPECTL_RMODE_BITS] = tmp_pipectl[`CA53_FP_PIPECTL_RMODE_BITS] |
Same operand 'tmp_pipectl[((((... 1) + 1) + 5))] ' used on both sides of an assignment
SignedUnsignedExpr-ML
Module: gic500_icb_rd0_cpu
File: a53x1_GIC500/RTL/gic500_defs.v
Line number: 243
RTL expression: cpu_num = cpu_min(aff1) + aff0;
Unsigned expression 'aff0' used with signed expression 'cpu_min(aff1)'
W216
Line number: 244
RTL expression: aff_to_cpu_num = cpu_num[LOG2_NUM_CPUS_MSB:0];
Inappropriate range select for int_part_sel variable: "cpu_num[LOG2_NUM_CPUS_MSB:0] "
W241
Module: gic500_axis_addrdec
File: a53x1_GIC500/RTL/gic500_axis_addrdec.v
Line number: 75
RTL expression: output wire p0_its_translate_req,
Output 'p0_its_translate_req' is never set.[Hierarchy: ':a53x1_top_22fdx...500_axis_addrdec']
W416
Module: ca53dpu_mac
File: a53x1_CORTEXA53/RTL/ca53dpu_mac.v
Line number: 541
RTL expression: adif = ~dif[8] ? dif[7:0] : b - a; (LHS: 8, RHS: 9)
Return type width '8' is less than return value width '9' in function 'adif' [Hierarchy: ':a53x1_top_22fdx...ca53dpu_mac:adif']
W468
Module: ca53governor_cpu_timers
File: a53x1_CORTEXA53/RTL/ca53governor_cpu_timers.v
Line number: 558
RTL expression: assign nxt_pcnt_sample_bit = cp_cntpct[cnthctl_evnti] ^ cnthctl_evntdir;
Variable/Signal 'cp_cntpct' is indexed by 'cnthctl_evnti' which cannot index the full range of this vector.[Hierarchy: ':a53x1_top_22fdx...ernor_cpu_timers']
W415
Module: ca53scu_l1d_tagrams
File: a53x1_CORTEXA53/RTL/ca53scu_l1d_tagrams.v
Line number: 392
RTL expression: assign l1d_tagram_cpu3_way1_rdata_o = {(CPU_CACHE_PROTECTION ? 40 : 33){1'b0}};
Signal 'a53x1_top_22fdxp..._way1_rdata[1:0]' has multiple simultaneous drivers
Could these lint errors be waived?
Thank you in advance.
Best Regards,
Jose Antonio.