Cortex-R52+ asynchronous abort

Grace WANG 9 days ago

I find whenever R52+ writes to a non-existing address, register address or memory address, it generates an asynchronous abort. It's not related to the MPU attributes.

Could you tell me why asynchronous abort generates for write, especially for MPU attribute is Device-nGnRnE ?

From my understanding, nE means the write transaction should wait for the completion ack.

BR, Grace

Top replies

Martin Weidmann 9 days ago in reply to Grace WANG +1 verified

Yes - the architecture allows that to happen. Whether a given processor does that (and if so, under what conditions) is a micro-architectural choice. I don't know the Cortex-R52 well enough to comment...