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Cortex-R52+ asynchronous abort

Hi

I find whenever R52+ writes to a non-existing address, register address or memory address, it generates an asynchronous abort. It's not related to the MPU attributes.

Could you tell me why asynchronous abort generates for write, especially for MPU attribute is Device-nGnRnE ?

From my understanding, nE means the write transaction should wait for the completion ack.

BR, Grace

  • I'm not an expert specifically on the Cortex-R52, but I cab give you an architectural answer.

    The nE attribute says that, if supported by the memory system, a write is not considered complete until it has reached the end point (e.g. a peripheral).  

    However, a write does NOT need to have completed for a STR instruction be retired.  To ensure the write completed, software needs to issue a DSB or DFB (R profile only) barrier.

    Or in summary: The DSB/DFB is how you "complete" the write, the nE attribute controls what "complete" means.

    More generally - I'd advise always setting up the MMU/MPU so that the processor cannot access non-existent locations. :-) 

  • Hi Martin

    Does that mean even the written address is nE, the STR instruction retires before the end point gives the completion or error response and when CPU receives the response for that write transaction, the instructions after the write have been executed ?

    BR, Grace

  • Yes - the architecture allows that to happen.  Whether a given processor does that (and if so, under what conditions) is a micro-architectural choice.  I don't know the Cortex-R52 well enough to comment.