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Understanding Transaction Types in ARM Systems: Real-World Applications

Ashbin Shiju

I am looking for practical applications of various transaction types in real-world ARM-based systems. For example, READONCE is commonly used in a display controller when reading a cached frame buffer. Similarly, how are other transaction types like ReadNoSnoop, WriteNoSnoop, ReadOnce, ReadClean, ReadNotSharedDirty, ReadShared, ReadUnique, CleanUnique, MakeUnique, CleanShared, CleanInvalid, MakeInvalid, WriteUnique, and WriteLineUnique used in actual hardware implementations?

Can anyone share insights or examples of how these are applied in systems like GPUs, memory controllers, or multi-core processors?

  • 0 Arm Employee Badge

    It is difficult to have a mapping table to summarize all the transaction types vs real applications. 

    Can we know under which scenario, you need to have this detailed table？

    General speaking, there are high level layers you can dig into if you want.  Take cache instructions as example.

    • Your real applications should know how to call the Linux APIs.
    • Linux OS calls APIs to map Arm64 cache instructions.

      • flush_cache_range(): Flushes (cleans) a range of cache lines.

      • invalidate_cache_range(): Invalidates a range of cache lines.

      • flush_dcache_page(): Ensures data is written back to memory.

      • dma_map/unmap_*(): Used for DMA operations where cache coherency is required.

    • Arm Architecture Reference Manual (Arm.ARM),  see ARM64 Cache Maintenance Instructions

      • DC CIVAC (Data Cache Clean and Invalidate by Virtual Address to Point of Coherency): Ensures a cache line is cleaned (written back to memory) and invalidated in other caches.

      • DC CVAC (Data Cache Clean by VA to PoC): Cleans but does not invalidate.

      • DC IVAC (Data Cache Invalidate by VA to PoC): Invalidates but does not clean.

    • AXI/ACE Protocol Interaction  

      • e.g. Cache Maintenance Operations
        • CleanShared A master component uses a CleanShared transaction to perform a clean operation on the caches of other components in the system. If a snooped cache that holds a dirty cache line receives a CleanShared transaction, it must provide that cache line so that the cache line can be written to main memory. The snooped cached can retain its local copy of the cache line
        • CleanInvalid A master component uses a CleanInvalid transaction to perform a clean and invalidate operation on the caches of other components in the system. If a snooped cache that holds a clean cache line receives a CleanInvalid transaction, it must remove its local copy of the cache line. If a snooped cache that holds a dirty cache line receives a CleanInvalid transaction, it must provide that cache line so that the cache line can be written to main memory and remove its local copy of the cache line.
        • MakeInvalid A master component uses a MakeInvalid transaction to perform an invalidate operation on the caches of other components in the system. If a snooped cache receives a MakeInvalid transaction, it must remove its local copy, but it is not required to provide any data, even if the cache line is dirty.

      • e.g. When an ARM core executes a cache maintenance instruction (e.g., DC CIVAC), the following happens:

        1. The core’s cache controller detects the operation.

        2. If the cache line is dirty, it is written back to memory (Clean).

        3. The AXI/ACE bus broadcasts an invalidation request to other caches (Invalid).

        4. Other cores snoop the request and invalidate their copies of the cache line.

        5. The memory controller ensures the latest data is visible to all agents.

    Please note for different CPU IPs or interconnect IPs, there may be slight behavior difference.