Hello everyone!
I am a developer working on the BSP for an ARM-based chip. The chip I am currently developing is configured in a multi-die environment, with one GIC chip on each of two dies. Each die contains 4 cores, and there is an address offset of 0x2000000000 between the dies.
The software stack is as follows (excluding the components between chipboot and TF-A):
My questions are as follows:
Looking at the GIC kernel driver code (drivers/irqchip/irq-gic-v3.c), it appears to be structured for a single instance. Is there a way to port GIC multichip support without modifying the driver?
Is there a reason why GIC multichip functionality hasn't been considered in the kernel? Were there any attempts to change the code to support a multi-instance structure, or is there any related history?
Thanks you!