Hello everyone,
We have been developing a bare-metal hypervisor for Cortex A53.
In this hypervisor, we use the instruction "AT S12E1R , Xn" to translate Virtual Addresses (provided by the Guest OS at EL1) to Physical addresses.
At EL1, we only configure the stage 2 MMU translation, and it has been working fine when booting with u-boot.
However , we recently changed our implementation to use our custom boot and this started to raise problems:
- The CPU core shuts down when running the "AT S12E1R, x0" with x0 having any virtual address (or IPA since we are only using stage 2).
So far we have tried to enable EL3 MMU or stage 1 EL1 MMU, but nothing worked.
We have cross checked the architecture configuration registers using u-boot and our boot and we did not find any misplaced configuration that would justify this behavior.
Is there anything we might be overlooking?
Thanks in advance.
Could there be some missing configuration?