We're working on a proprietary RTOS for an A9 MP environment. Each secondary core will have it's own copy of the RTOS. The main core, among other things, initializes the caches and MMU. The memory is flat mapped. The main core sets secondary core memory as WB for code and WBNA for data and then writes the actual code (from an eMMC) into the code space (in physical memory). My question is does the code space need to be invalidated before the core is started? Nothing is read from it before the core is started, so I assume that when the core starts to read the code in, then there will be cache fills with no need to invalidate the space previously. Is this correct?