for arm cortex-a53 aarch64 mode,
with compile command "armclang.exe --target=aarch64-arm-none-eabi -mcpu=cortex-a53 "
sometimes I meet sync exception，and find stur instruction in disassembly code
is there any cpu feature or compiling option needed for stur?
anyway if I modify the C code so that there is only str (no stur) in disassembly code after compiling, no exception will occur.
any advice is admired, thanks.
Hi WatterCutter,
The STUR instruction is a base A64 instruction, which does not require any specific feature.
A synchronous exception could be generated by the STUR instruction, though, such as a Data Abort exception.
Do you know the values of the ESR_ELx and FAR_ELx registers when encountering exceptions?
This could help with understanding what is going on.
Best regards,
Vincent.