About unsupported exclusive or atomic access issue

Hi,

I am working on FPGA platform having 1 cluster of A725 with 3 cores. I am running QNX on cluster-0/core-0 without HYP. While QNX kernel booting, I am getting data abort exception 0x96000035 (unsupported exclusive or atomic access) when executing a specific instruction, CASAL, in the following process and setting. 

[Steps]

1. Get result 0b0010 from CPU register ID_AA64ISAR0_EL1 Atomic, bits [23:20] <- LSE support
2. MMU enable before kernel start in EL1
3. Execute instruction 'casal w1,w2,[x0]' 
4. Get error code '0x96000035' in ESR_EL1 register

            bit[5:0] 0b110101 means IMPLEMENTATION DEFINED fault (Unsupported Exclusive or Atomic access).

In step 4, the ESR_EL1 shows that an unsupported exception is triggered when executing the casal instruction, but in step 1, the capability retrieved from the CPU register indicates that it is supported. Two information are conflict. After attempting to run QNX without LSE flag rising, it runs normally.

Can anybody give hint on the issue?