Good day.
I am reading the Arm®v7-M Architecture Reference Manual and I see this table in the memory access order
with a corresponding description of the access order.
Next I read the document ARM Cortex-M Programming Guide to Memory Barrier Instructions Application Note 321, which has exactly the same table, but there is a very important subtlety described in the text:"The Cortex-M processors never perform memory accesses out of order compared to instruction flow, however, the architecture does not prohibit this in future implementations."
That is, in Cortex-M4 the memory order is guaranteed by the implementation, and the table above must be filled entirely with "<" symbols. Right?
If so, why, for example, in the STM32 Cortex®-M4 MCUs and MPUs programming manual is there still a table like in the first picture, i.e. the document knows nothing about the strict ordering of memory accesses in the Cortex-M4 core implementation? Where is the truth?
I think the problem is the word "guarantee".
The only guaranteed ordering is what the architecture defines in the table. And that is what software should rely on.
In practice we know M4 will issue accesses in order but software should only rely on architectural guarantees.