Hi, I was trying to enable the CCR.DIV_0_TRP-> To trap the Divide by zero fault .
I took the example from the reference document where they are trying enable another bit of the same register.
Similarly i trued to enable the CCR.DIV_0_TRP
But was facing exception. Since MPU is not yet enabled every region has privilage access.
is there any thing else to be followed which i am missing.
Thankyou
Pragathi