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Can Cortex-M33 MCUs enable SAU and MPU_NS simultaneously?

Hi everyone, I was trying to run FreeRTOS-MPU at the non-secure world (MPU_NS enabled) and some trusted code at the secure world (MPU_S disabled).

When I enabled SAU but disabled both MPU_S and MPU_NS, the program ran normally.

However, if I configured MPU_NS with proper permissions, the program encountered unexplainable errors.

In the vRestoreContextOfFirstTask function, the load instruction (address 0x08041030) after the store instruction (address 0x08041026) that enabled the MPU, triggered a Secure HardFault.


And I then checked the HFSR register, its value was 0x40000000. HFSR.FORCED indicated that there was an escalated exception.

So I further checked the CFSR_NS register, its value was 0x00000082. Apparently, there was a MemMange Fault and it finally escalated to a HardFault.

And I also checked the MMFAR register, its value was 0x2002b460, where was exactly read by the load instruction at address 0x08041030.


However, MPU_NS allowed read and write access to 0x2002b460 by any privileged level. Below is the configurations of MPU_NS, region 4 allows any privilege level read and write to range 0x200274a0 and 0x2002b4bf.


So the program tried to read 4 bytes of memory and its target was permitted by MPU_NS. However, it still triggered an MemManage Fault and escalated to a HardFault eventually.

However, it seemed strange that the value of SHCSR_NS indicating that the MemMange Fault for non-secure world was enabled.

Is there anything configured wrong or something conflicted between SAU and MPU? Thanks!

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