ASIC AES in ARM CPU, on data bus

Hello to all,

Is it possible to create an ARM CPU compatible with DMA (Direct memory access), that can run an OpenBSD or a Linux, with an ASIC AES in the CPU.

The ASIC gets the 64 bits of the data bus from the CPU side, and give's a 64 encrypted bits on the bus data from the other side of the ASIC, this side go's to the RAM. The data bus is cut, and the ASIC is placed in an intermediate way on the data bus, inside the CPU.
The ASIC is on the same clock as the CPU, and read's the addressees of the data, it is used as the IV for the AES function. No need to have access to the instruction bus.
The ASIC won't encrypt when the address is equal to the addresses of the LAN buffer, so we can communicate with the system. 
No other input/output peripheries than the LAN and SSD.
The ROM and the boot sector are encrypted with the same AES function and key.
The only data that are not encrypted are the tag for the end of the boot sector, like 01010101 and the LAN buffer.
The ASIC should be in the CPU, just before the exit of data bus.

Is it possible to do so ?

The idea is to have a CPU that can encrypt with a independent hardware all the data in RAM through the data bus, and a DMA to manage the data transfer to the peripheries.
All the data in all peripheries are encrypted, the only data that are not encrypted are the tag for the end of the boot sector, like 01010101 and the LAN buffer.


Hop that my question is clear and not crazy, and thank you for your time.