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M55 CPU - AXI 64 bit access to peripheral

I'm trying to perform a 64 bit write access to a certain memory (data access) located in the peripheral area using the M55 AXI bus.

I see the disassembly and it looks ok ("strd" command).

however, in the waves, I see that the M55 exported 2 AXI operation . each one is 32 bits width.

is there a way to configure it to export it with a single 64 bit operation instead of two 32 bits operations?

note that fetch access does generate a AXI 64 bit transaction . looks like it only related to data access.

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