Hi,
I am trying to understand if Guest OS data abort happens due to accessing some memory (e.g GIC distributor space) then is there any way I can route it to EL2 mode ?
I looked into HCR_EL2 register bits and tried setting AMO bit but it doesn't help. I see the control still reaching to EL1 Syn handler.
I would like to provide some RW memory functionality from EL2 so I want to trap it ?
Thanks.
When exactly do they change? If you write the register and read is back immediately, what value do you see?
Hi Martin,
I am writing MAIR_EL1 value as 0x000000FF440C0400 and I can see from DS-5 debugger this value but as soon as I enable MMU writing to SCTLR_EL1 the value in MAIR_EL1 changes to 0x000000CC440C0400 which I see in DS-5.