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Disable all H/W prefetchers on ARM Cortex A-57

Hi Community,

I am trying to disable the hardware prefetchers on arm cortex A57. This includes and cache line preftching or any other data pefetching etc.

I am aware of ARM's exception levels and the fact that i might have to tweak bootloader itself. 

Some set of blogs, specific registers to set/unset etc. or some flowchart regarding this specific/ similar problem would be a great assistance.

if anyone could help regarding this , then it would solve a long standing problem for me.

Regards

Shikhar Jain.

Parents
  • hi martin. i am trying to benchmark caches to measure quantities like communication bandwidths, misses etc. Thus it is crucial (as suggested by academic research) to disable any data prefetching(at least) . For intel desktop/workstation cpus, this is easy to control. But i cannot wrap my head around how this would be achieved in the case of ARM CPUs. 

    I am curious, wether any common workflow exists for this particular problem in the case of arms cpu's . If possible, please share high-level steps(or any other resources) to disable them from the bootloader level. i want them to be disabled system-wide. 

    Regards

Reply
  • hi martin. i am trying to benchmark caches to measure quantities like communication bandwidths, misses etc. Thus it is crucial (as suggested by academic research) to disable any data prefetching(at least) . For intel desktop/workstation cpus, this is easy to control. But i cannot wrap my head around how this would be achieved in the case of ARM CPUs. 

    I am curious, wether any common workflow exists for this particular problem in the case of arms cpu's . If possible, please share high-level steps(or any other resources) to disable them from the bootloader level. i want them to be disabled system-wide. 

    Regards

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