Hi Community,
I am trying to disable the hardware prefetchers on arm cortex A57. This includes and cache line preftching or any other data pefetching etc.
I am aware of ARM's exception levels and the fact that i might have to tweak bootloader itself.
Some set of blogs, specific registers to set/unset etc. or some flowchart regarding this specific/ similar problem would be a great assistance.
if anyone could help regarding this , then it would solve a long standing problem for me.
Regards
Shikhar Jain.
ShikharJain said:I am trying to disable the hardware prefetchers on arm cortex A57.
Why?
The architecture gives you some controls for limiting speculation, for example the execute-never attributes to control where instructions are prefetched from. Similarly, marking regions as Device prevent data access speculation.
There are also some processor specific controls described in the TRM:
https://developer.arm.com/documentation/ddi0488/h/system-control/aarch64-register-summary/aarch64-implementation-defined-registers?lang=en
But whether of these approaches are likely to help depends on what problem you're trying to solve.