Hi I'm Dongin
I have a question on chapter D4.8.7 in AMBA AXI and ACE Protocol Specification version H.c
I see that a cached manager with dirty cache line can't issue WriteUnique and WriteLineUnique transaction.
But I wonder why those restrictions are necessary.
I guess without this restrictions, deadlock situations might occur.
And I also want to know a situation that a cached manager issues WriteUnique transaction.
I think that, If a cahed master want to write something on main memory, issuing WriteBack or WriteClena would be more reasonable way.
And if the manager want to be unique state, it can issue MakeInvalid transaction.
WriteUnique and WriteLineUnique are intended to be used by non-caching managers to issue I/O coherent writes. Cached fully coherent managers are intended to cache the line in a Unique state before trying to write to it.
If it wishes to update main memory, then as you say, it can use a memory update operation such as a WriteBack after writing to the line in a Unique state.
However, ACE managers are allowed to issue WriteUnique/WriteLineUnique, but are not allowed to issue them from a Dirty state as you say. This avoids adding lots of extra complexity to the specification without a meaningful benefit. If the line was already Dirty, then the ACE manager should use WriteBack or WriteClean to update main memory