Hi!
I have a question. Why is down coutner more efficient than up counter?
In CMSDK, all of timers are with down-counter. I think there is a reason that ARM utilized down-counter except up-counter.
Thanks for your reply.
However, I want to know the reason aspect of Digital Circuit.
I guess there are differences in circuit between down-counter and up-counter
I believe it's still essentially the same answer. Counting up to an arbitrary limit requires you store both the current count and the limit value. Counting down to zero only requires you to store the current count - so less storage.