Cortex M0+ SWD debug reference implementation

I am developing an FPGA based SWD debugger (similar to the ST Link but with an FPGA instead of the STM32). While I understand the low level protocol now and can reset the system and read IDCODE, I am lost about how to implement further functions like reading the flash, writing the flash, configuring breakpoints, halting the core etc. The ARM documention is extensive, what I cannot find though is a hint to a reference implementation or just simply some flowcharts or preudocode algorithms to accomplish the above mentioned tasks.

Is anyone aware of any such documentation and can point it out to me? I wish to have a very simple debugger without the overhead of the GDB or openOCD, just a system that can accomplish very basic tasks.