I am a MCU digital IC designer. In our MCU design, we used Cortex-M7 to control our system. A random problem occures during my simulation.
The LD file defined the RAM/CODE region(0x2801000~0x28030000), but M7 fetched instruction from 0x2800_fxxx sometimes. The memory from 0x2800_0000 to 0x2800_ffff is reseved,so it is not initiated at the start of simulation. Once M7 fetched instruction from 0x2800_fxxx, R-channel would get 64'hXXXX_XXXX, then M7's behaivor is un-predictable.
We had reviewed our c-code, there is not operation to load from 0x2800_0000 to 0x2800_ffff region. So I wonder why M7 can initiate a instruction-fetch transaction from 0x2800_fxxx.
Hi there, thanks for asking your question. I have moved it to the Architectures and Processors forum. Many thanks.
This issue might be related to speculative access. The Cortex-M7 processor makes extensive use of speculative accesses to areas of Normal Cacheable memory and executable address ranges. With no MPU in place or enabled, large portions of the 4GB address space match these attributes.
If the access is speculative the processor will ignore the error response and for a non-speculative access the processor should take the fault. Cortex-M7 can perform speculative accesses to any location at any time, and it is not practical to identify the cause of any one speculative access.
Further information about speculation can be found in the TRM:
thanks for your reply. as you mentioned, the root cause is speculative accesses.I tried to configure the region as EXECUTE NEVER with MPU. This problem has not apear agin.