No interrupts occur with Cortex-R4. What could be the cause?
The H/W uses a simulator that simulates Renesas Electronics' RZ/T1. It is equipped with ICUA as an interrupt controller, and has a VIC (Vector Interrupt Controller) inside.
For IRQ interrupts, by storing the branch destination address in advance in the interrupt address storage register (VADn) prepared for each interrupt source, the vector address is provided from the interrupt controller to the Cortex-R4 when an interrupt occurs, and the VADn register settings It is possible to branch directly to a value address.
VIC and Cortex-R4 are connected by 1-bit interrupt notification and 32-bit VAD. The VIC side is the master for both signals. When an interrupt factor occurs, the interrupt notification becomes active and the VAD corresponding to the interrupt factor is notified to Cortex-R. Therefore, I believe that the interrupt controller settings are correct.
The value set in the VIC's VAD register matches the symbol information in the elf file, so I believe it is correct. Also, it has been confirmed that when an interrupt factor occurs, the VAD as set value is notified to Cortex-R4.
Therefore, we suspect that the cause is that the interrupt signal is unintentionally masked on the Cortex-R4 side. The value of the CSPR register of Cortex-R4 is 0x80000173, and the IRQ mask bit of bit[7] is set to 0 (not masked).
Despite this situation, the program does not jump to the interrupt routine. The S/W behaves as if no interrupt had occurred.
Have no idea what is causing it?