Difference between the CPU_CYLES and PMCCNTR_EL0


I know that the Arm architecture supports the CPU_CYCLES (event # 0x0011) and an independent dedicated Cycle counter (PMCCNTR_EL0).  I assume that the PMCCNTR_EL0 and a PMU event counter that counts the CPU_CYCLES PMU event count the same thing -- which is the CPU cycles. Why does Arm architecture support two means for the same thing? 

Do people ever need to use a CPU_CYCLES given that a dedicated cycle counter already exist? 

  • Hello, PMCCNTR_EL0: The PMCCNTR_EL0 register is a dedicated cycle counter that provides a low-overhead and accurate measurement of CPU cycles. It is a 64-bit register accessible in EL0 (user mode), allowing software to directly read the cycle count. This register is typically used for fine-grained cycle counting and precise performance measurements. CPU_CYCLES event counter: The CPU_CYCLES event counter, identified by event number 0x0011, is one of the many performance events that can be monitored using the PMU. The PMU allows monitoring and profiling of various performance events in addition to CPU cycles, such as cache misses, branch instructions, or instructions retired. The CPU_CYCLES event counter provides a way to measure the number of CPU cycles used by a specific software execution.   ExpressHR Kroger