Hi ,
we are facing issue 798870: A memory read can stall indefinitely in the L2 cache, to work around to set L2ACTLR [7], we need to set the bit in SBL or we can mange setting the bit in application?
Hi there, please may you have a look at the list of Support Forums here: https://community.arm.com/support-forums/ and let me know which forum your question is best suited to? Many thanks.
Hi Annie,
sorry i am new to it , it belongs to Architectures and Processors forum
Hi there, no need to worry. Thank you for letting me know, I have moved your question now. Many thanks.