Hi ,
we are facing issue 798870: A memory read can stall indefinitely in the L2 cache, to work around to set L2ACTLR [7], we need to set the bit in SBL or we can mange setting the bit in application?
Hi there, please may you have a look at the list of Support Forums here: https://community.arm.com/support-forums/ and let me know which forum your question is best suited to? Many thanks.
Hi Annie,
sorry i am new to it , it belongs to Architectures and Processors forum
Hi there, no need to worry. Thank you for letting me know, I have moved your question now. Many thanks.
Hello, To address issue 798870 regarding a memory read stalling indefinitely in the L2 cache, the recommended workaround is to set the L2ACTLR [7] bit. Depending on your specific scenario, you can manage setting this bit either in the SBL (Secondary Bootloader) or in the application itself. The choice of where to set the bit will depend on the level of control and access you have over the bootloader and the specific requirements of your application. MyGeorgiaSouthern