Cannot Perform MTB Configuration on Dual-Core Cortex-M33 ( i.e., AN521 Image) of MPS2+ Board

Hello everyone,

I am having trouble using the Micro Trace Buffer (MTB) on the AN521 image, which has dual Cortex-M33 cores (SSE-200), of the MPS2+ board. I have successfully launched MTB on AN505 of the same board. So I followed the same MTB configuration that worked on the AN505 image, which has a single core Cortex-M33 (SIE-200), and I also referred to the data sheet of AN521, but I failed to launch MTB on the AN521 image.

I tried to modify the MTB registers (starting at the address 0xE0043000) and the MTB buffer memory region (starting at the address 0x24000000) on both cores, but the system stopped running after accessing these memory regions.

Here are more details of what I have done: I followed the Zephyr project guidelines (https://docs.zephyrproject.org/2.7.0/boards/arm/mps2_an521/doc/index.html) , used the 'mps2_an521_remote' build option to build two firmware for Core0 and Core1, and loaded the Core0 firmware into the secure region (0x1000 0000). However, the board stopped running after accessing the MTB registers and MTB buffer regions on any core.

I wonder if the AN521 image supports MTB at all? And if it does, can I use MTB on both cores? Also, is it possible for one core to access the MTB buffer of the other core?

I appreciate any help or insights on this matter. Thank you in advance!