"Hi , I had recently installed DS5 and ran the matric multiplication application from SVE examples , since I had chosen the N1 as the FVP environment, I observed the vector length was 8 x 64 bits(since application had float 64 as datatype) = 512 bits. I am exploring more on how to force to use the predicate register to utilize the 2048 bits in SVE2 platforms "
Thanks for replying , I meant for N1 only , i was not aware of this AEM , is this an FVP within in the DS5 ? , my intention is to experiment 2048 bits vector length in FVP environment using DS5 since i dont have the hardware, kindly point to on which Neoverse FVP model in DS5 would help for the experiment
My knowledge of DS-5/Arm DS is a little out of date I'm afraid. But I know you can download the AEM standalone from this page:
You want the model called "Armv-A Base RevC AEM FVP". This is a "generic" model, rather than a model of a specific processor. That means you have greater freedom in configuring it. You will need to set the desired max vector length using a parameter when you launch the model (the parameter is called "veclen").More info here:
DS-5 is a very old toolchain. It has long been superceded by Arm Development Studio, which includes Neoverse N1 (and N2) FVPs and examples:https://developer.arm.com/Tools%20and%20Software/Arm%20Development%20Studio