Please note: We are aware of an issue affecting replies on the Arm Community forums, which may not be loading as expected.
We apologize for any inconvenience and appreciate your patience while we investigate and work to resolve the issue.
Thank you for your understanding.
Hi,
As per the title says, I'm getting an unaligned memory access fault with an STRH instruction. I know the memory referenced in the instruction is unaligned, but I only expected a performance penalty, not a hard fault. Instruction that causes the error:
strh r7, [r0, #4]
Register values:
Have added before/after register values for SCB.
Is there any chance that NXP didn't implement the support for unaligned memory access, as described in the Cortex-M7 ARM reference manual?