Unaligned memory access fault with STRH on Cortex-M7

Hi,

As per the title says, I'm getting an unaligned memory access fault with an STRH instruction. I know the memory referenced in the instruction is unaligned, but I only expected a performance penalty, not a hard fault.  Instruction that causes the error:

strh    r7, [r0, #4]

Register values:

Have added before/after register values for SCB.