Hi, all
What is the content of Context ID Register of ARM Cortex A9. Is it OS that is responsible for assigning the value
of Process ID and ASID? As far as I know, it is so in Linux. Is that the same in the other OSes?
Is it essential to deal with ASID if I want to make context switch correctly? Does Cortex A8 have no Context ID
Register? Minix's process context switch running on a Cortex A8 core doesn't cope with ASID when it writes
TTBR.
Thank you.
Best Regards,
Channing M.
I wonder, is there really no way (hidden bit) to disable hardware table walk and write TLB entries directly?
It would be good if you gave reasons for what you say and for what you want to do. It would probably be better to start up a a separate discussion as it seems to not be closely related to this one.