How do i force these two instruction execution in the program order?
MSR PMCR_EL0, X1STR X0, [X2]
Can an ISB instruction, inserted between these 2 instruction help in ordering? DMB and DSB wouldnt help, i guess
This is correct, you need to insert an ISB between the two instructions.See Instruction barriers for an introduction and section "Synchronization requirements for AArch64 System registers" in the Arm Architecture Reference Manual for A-profile architecture for complete documentation.