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[armv8][cortex-a72] why must flush data cache when I tried to map a SRAM area?

kenneth-10086

I tried to map a SRAM area, I add that area (from 0x700000000 to 0x70FFFFFF) to page table and set Memory Attribute Indirection Register as normal memory and cacheable.

But when I try to read thar area(from 0x700000000 to 0x70FFFFFF) I found it could not be cached. I should flush data cache after  adding that area to page table. 

Then I tried a DDR area, I found it is no need to flush data cache and I wanna to know why?

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