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Dear everyone:
I baremetal boot the Cortex-A55,want it to work on AARCH32 state at the EL1,but always into the exception.
I refer to the book which named DAI0527A_baremetal_boot_code_for_ARMv8_A_processors .
// Initialize the SCTLR_EL1 register before entering EL1.MSR SCTLR_EL1, XZRMRS X0, HCR_EL2BIC X0, X0, #(1<<31) // RW=0 EL1 Execution state is AArch32.MSR HCR_EL2, X0MOV X0, #0b10011 // DAIF=0000MSR SPSR_EL2, X0 // M[4:0]=10011 EL1 is SVC mode must match HCR_EL2.RW.// Determine EL1 Execution state.ADR X0, el1_entry // el1_entry points to the first instruction of SVCMSR ELR_EL2, X0 // mode code.ERETel1_entry:// EL1 code here.
I saw the Cortex-A55 Product Specifications。It can work on AARCH32 at EL0 status。
https://www.arm.com/zh-TW/products/silicon-ip-cpu/cortex-a/cortex-a55
shoud use Chine Taiwan language to see the the Cortex-A55 Product Specifications。