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I was studying the A55 baremetal boot. I changed the execution level from EL3 to EL2 then to EL1 can work very well,but EL1 can not change to EL0.I use the spsr_eln and elr_eln register with the instrcuction eret from higher EL to lower EL. but the EL1 to EL0 always causes excepiton and the ESR_EL3 show the error infor is 92000050.I did not setup MMU.
Thanks by advance
The reported ESR_ELx.EC code looks to be 0b100100, which is Data Abort from Lower EL:
https://developer.arm.com/documentation/ddi0601/2022-06/AArch64-Registers/ESR-EL3--Exception-Syndrome-Register--EL3-?lang=en#fieldset_0-31_26
The ISS field gives more information. If my mental conversion to binary is correct, the syndrome you're getting is "Synchronous External abort, not on translation table walk or hardware update of translation table."
What you running the code on? Is it a model?
Thank you very much for your reply.I running the bare metal boot code on Cortex-A55.All the boot code is design by our teams.I just responsible for debug the assembly code which boot the running environment.I want switch EL1 to EL0 with the spsr_el1 and elr_el1 register,and use the eret instruction.Then it come across the exception.Now I found it was caused by without allocating stack space and El0 cannot access to the system register.Thank you