Architectures and Processors forum How many clock cycles does it take to switch working states by CPS #n

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How many clock cycles does it take to switch working states by CPS #n

Nowian over 3 years ago

Hi everyone!

I usually use the instruction CPS to switch working states form PL1 to PL0, or switch between PL1s. How many clock cycles does it take?

Based on Cortex-R5, will it take a long time？

Thanks.

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+1 Martin Weidmann over 3 years ago

I think you want this section of the Cortex-R5's Technical Reference Manual (TRM):

https://developer.arm.com/documentation/ddi0460/d/Cycle-Timings-and-Interlock-Behavior/Processor-state-updating-instructions?lang=en

But note there's more to it than just the cycles needed by the core. There's the dual issue rules (https://developer.arm.com/documentation/ddi0460/d/Cycle-Timings-and-Interlock-Behavior/Dual-issue?lang=en), whether you hit/miss in the cache, etc...
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+1 Martin Weidmann over 3 years ago

I think you want this section of the Cortex-R5's Technical Reference Manual (TRM):

https://developer.arm.com/documentation/ddi0460/d/Cycle-Timings-and-Interlock-Behavior/Processor-state-updating-instructions?lang=en

But note there's more to it than just the cycles needed by the core. There's the dual issue rules (https://developer.arm.com/documentation/ddi0460/d/Cycle-Timings-and-Interlock-Behavior/Dual-issue?lang=en), whether you hit/miss in the cache, etc...
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0 Nowian over 3 years ago in reply to Martin Weidmann

Thank you very much! Very helpful.
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