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The reason why the exception frame forms on PSP?

Yasuhiko Koumoto

Hello experts,


I would like to ask the reason why the exception frame forms on PSP in the Cortex-M architecture.
My understanding is that MSP (Main Stack Pointer) is the interrupt stack pointer and PSP (Porcess Stack Pointer) is the normal (user) stack pointer.
From my little experiences, the exception frame was formed on the interrupt stack.
However, the ARM forms it on the user stack.

Best regards,
Yasuhiko Kouoto.

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  • 0 in reply to Yasuhiko Koumoto

    The other register are what I referred to as 'some registers' above.

    One could have the timer routine do the copying in the top level of the interrupt routine as I showed above - but it is easier to do it by setting the PendSV flag when it is decided a switch should be done. Then instead of returning to the old process when the timer routine exits it enters the PendSV interrupt routine.

    The PendSV routine will be entered with the interrupt state saved on PSP and all the other registers ready to be saved away. It does all the saving and restoring and setting the new PSP pointer and finally returning to continue execution in the new process.

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  • 0 in reply to Yasuhiko Koumoto

    The other register are what I referred to as 'some registers' above.

    One could have the timer routine do the copying in the top level of the interrupt routine as I showed above - but it is easier to do it by setting the PendSV flag when it is decided a switch should be done. Then instead of returning to the old process when the timer routine exits it enters the PendSV interrupt routine.

    The PendSV routine will be entered with the interrupt state saved on PSP and all the other registers ready to be saved away. It does all the saving and restoring and setting the new PSP pointer and finally returning to continue execution in the new process.

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  • 0 in reply to daith

    Hello daith,

    thank you for your patient explanations.

    I have now almost understood what you had said.

    However, I wonder one thing.

    In a case of a context switch, why are the registers on the stack (e.g. MSP or PSP) referred? I think to use STM or LDM is more convenient.

    How do you think?

    Best regards,

    Yasuhiko Koumoto.

  • 0 in reply to Yasuhiko Koumoto

    I'm not sure I've understood you properly - sorry. Yes I very much suppose they various registers would be saved or loaded using LDM and STM instructions. It is a place where one can't get away with just C code unfortunately.

  • 0 in reply to daith

    Hello daith,


    my concerning point is that I guess the context switch routine will be written by assembler.
    In the case, the software can directly save the current registers to the appropriate area other than LR, PC and xPSR.
    If this is correct, it will be convenient if those registers (i.e. LR, PC and xPSR) are on MSP rather than PSP.
    If they are on PSP, the software should check where they exist on MSP or PSP.
    Therefore, I feel it is really advantage which some contexts are saved on PSP.
    Although I basically understand what you say, I cannot believe it will be for the context switch that some contexts are saved on PSP.

    Best regards,
    Yasuhiko Koumoto.