For VIC (PL192), let's assume an interrupt asserted to VIC and VIC assert nIRA to CPU, CPU not ack-ed it by read VICADDR yet, if VICSWPRIORITYMASK bit set to mask this interrupt, will VIC cancel this interrupt and deassert nIRQ?
And for scenario#2, if the interrupt source be cleared before VIC be acked by ading VICADDR, will VIC will cancel this interrupt and deassert nIRQ?