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SMMU initialization

Dav

Hi,

Where i can find step-by-step instruction how to init SMMU PA->IPA translation? (With procedure description)

(i checked ARM ® System Memory Management document, but i was not found exact instruction how to setup correct translation).

I have ARM Cortex-A7 MP with SMMUv1 where GPU is located. I need to translate physical address 0x60 0000 0000 (GPU base address) to virtual address 0x3000 0000. Is it possible to translate it?

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  • +1 Arm Employee Badge

    Setting up the SMMU  is fairly complex if done manually, you need to:

    From secure code:

    • Configure secure byapss mode (using SMMU_sCR0)
    • Configure the number of non-secure contexts (using SMMU_SCR1)
    • Invalidate the SMMU's TLBs

    From NS code:

    • Configure non-secure translate mode (using SMMU_CR0)
    • Program up a stream match register (SMMU_SMRn) to match the StreamID of your GPU to a stream to context register (SMMU_S2CRn)
    • Program that context bank's Context bank attribute register (SMMU_CBARn) to be a stage 2 only translate context
    • Write some page tables to do the translations you need
    • Program up the TCR, TTBR0 and SCTLR for context bank you have mapped the streamId to.  Point TTBR0 at the page tables

    Execute a DSB to make sure that all happened and you're set!

    There is a linux IOMMU driver for ARM SMMUs that might be worth a look at.

Reply
  • +1 Arm Employee Badge

    Setting up the SMMU  is fairly complex if done manually, you need to:

    From secure code:

    • Configure secure byapss mode (using SMMU_sCR0)
    • Configure the number of non-secure contexts (using SMMU_SCR1)
    • Invalidate the SMMU's TLBs

    From NS code:

    • Configure non-secure translate mode (using SMMU_CR0)
    • Program up a stream match register (SMMU_SMRn) to match the StreamID of your GPU to a stream to context register (SMMU_S2CRn)
    • Program that context bank's Context bank attribute register (SMMU_CBARn) to be a stage 2 only translate context
    • Write some page tables to do the translations you need
    • Program up the TCR, TTBR0 and SCTLR for context bank you have mapped the streamId to.  Point TTBR0 at the page tables

    Execute a DSB to make sure that all happened and you're set!

    There is a linux IOMMU driver for ARM SMMUs that might be worth a look at.

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  • 0 in reply to Peter Rielly

    Thank you for your answer.

    I got a problem:

    In errata i found this: The SMMU TLB is not functional in the device, therefore the address translation feature of all
    the SMMU's cannot be enabled/used. Nonetheless, the remaining attribute translation can still
    be used.