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ISR should disable interrupts or does the ARM processor do it automatically when interrupt comes from a peripheral

MysteryLinux

Arm IRQ handler will call the ISR via  like this (See the asterisk mark in below code):

  IRQ_Handler

      PUSH   {r0-r3, r12, lr}    @ Store AAPCS registers and LR onto the IRQ mode stack
      BL                         @ identify_and_clear_source
      BL                         @ C-irq_handler    ***** 
      POP    {r0-r3, r12, lr}    @ Restore registers and
      SUBS   pc, lr, #4          @ return from exception using modified LR


So it means Linux ISR or ISR only disabling the interrupt ? And until ISR disable the interrupt line ,will ARM receive interrupt from others peripheral ?
Also untill we clear the interrupt at ISR , can ARM will receive one more interrupt on same INTR line ?

Regards
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