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Hi Experts,
I am developping linux kernel with ARMv8-A processor.
Kernel can work both secure EL1 and non-secure EL1.
How to obtain CPU state is secure or non-secure in kernel?
SCR_EL3[0] can indicate EL1/EL0 secure/non-secure state, but it can not be accessed in kernel.
Is there CPU register can be accessed in kernel to indicate secure or non-secure state?
Thanks for your attention!
Best Regards,
yan
Hi there, I have moved your question to the architectures and processors forum. Many thanks.
It's unusual to have a piece of code that might run in either Secure or Non-secure state on a given processor. Partly because the two Security states are (typically) used for very different things. It's therefore unlikely that same, say, OS would be the best choice for both worlds. Because of this, most code will just "know" what Security state it expects to run in.At EL1 there isn't an easy way of determining the Security state. There are few ways you could infer it. For example, some of the GIC registers (e.g. ICC_BPR1_EL1 and GICR_IGROUPRn) behave differently in Secure and Non-secure states. That's still not perfect, as in EL1 there might be a hypervisor that your code is running under. That hypervisor could be emulating some of your accesses.
Emmy0 said:How to obtain CPU state is secure or non-secure in kernel?
How about having an `SMC` to retrieve state via EL3?
Thanks for your explanation.
I use GICD_IGROUPRn to check, it can work.
Yes, If I can get EL3 exception source code, it is a solution via SMC to retieve EL.
Thanks for your help!