Cortex-A53 L2 cache invalidation

Is it possible to invalidate by software the L2 cache in Cortex-A53?

My code is currently too small to produce cache misses in the L2 cache so that I would like to simulate L2 cache misses by invalidating the L2 cache to be able check the performance degradation.

If yes, how to do it? Is "ic ialluis" + "isb sy" the correct way to do it?