What's the meaning of the entry of exception vector for ARM-VA7

Hi all,

  What's the meaning of the entry of exception vector for ARM-VA7? They are the address for the next PC, or they are instructions to execute?

  For example, I use cortex-A7 and the entry of reset vector is 0xE59F1018, which means LDR PC, [PC,#0x18]. After the release of reset, the A7 core reads the address 0 and address 0x20, and then it reads address 0xE59F1010. Why the A7 read address 0xE59F1010? I think it should read address 0x20.