What's the meaning of the entry of exception vector for ARM-VA7? They are the address for the next PC, or they are instructions to execute?
For example, I use cortex-A7 and the entry of reset vector is 0xE59F1018, which means LDR PC, [PC,#0x18]. After the release of reset, the A7 core reads the address 0 and address 0x20, and then it reads address 0xE59F1010. Why the A7 read address 0xE59F1010? I think it should read address 0x20.
Please read the armv7-a manual. Then you will get the answer.
It's said in the armv7-a architecture reference manual:The appropriate exception vector is loaded into the PC.
From the source I can get, I think the entry of vector table is a instruction. But the result is not what I think.
It also says:"When an exception is taken, processor execution is forced to an address that corresponds to the type of exception. This address is called the exception vector for that exception."
I think it is pretty clear what it means.
Thanks a lot!
And for the original question, it's caused by some other reason, and it works right now.