• State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 4 replies
  • Subscribers 350 subscribers
  • Views 4070 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Compute the division via shift instruction

gapry

I write the code as following to evaluate the expression n = n / 2

asrs r0, r0, #1

But, I found the GCC will translate the expression n = n / 2 into the following instruction

lsrs r1, r0, #31                                                                             

adds r0, r1, r0

asrs r0, r0, #1

Why does it need to add the sign bit?

Parents
  • 0

    It looks like you're working with Cortex-M0.

    On other ARM architectures, including Cortex-M3 and later, I think you can use the following code:

                        add                 r0,r0,r0,lsr#31     /* r0 = r0 + (r0 >> 31) */

                        asrs                r0,r0,#1

    Size will still be 6 bytes, but it should use one clock cycle less; eg. 2 clock cycles in total.

Reply
  • 0

    It looks like you're working with Cortex-M0.

    On other ARM architectures, including Cortex-M3 and later, I think you can use the following code:

                        add                 r0,r0,r0,lsr#31     /* r0 = r0 + (r0 >> 31) */

                        asrs                r0,r0,#1

    Size will still be 6 bytes, but it should use one clock cycle less; eg. 2 clock cycles in total.

Children
No data