Hi, if coretex-a7 speculative accesses a virtual memory address which is not mapped to physical address, will it trigger a data abort as the normal instruction does? Thanks!
Take below instructions for example, suppose 0xd0010000 is not mapped to a real physical address,
str x0, [0xd0000000]
jump to label 1
str x1, [0xd0010000]
mov x0, x1 //Before this instruction is executed, if cpu spectulative accesses 0xd0010000, will cpu trigger a data abort? If so, the pc still points to this instruction?
Cortex-A7 does only make speculative "instruction" fetches, not data fetches.
Thanks for your reply! I have some more questions,
1. If cpu supports data spectulative access, will it trigger a data abort?
2. For specultative "instruction" fetches, does it mean the instruction is only fetched to cpu's pipleline but won't be executed?In the example above, the instruction "str x1, [0xd0010000]" can be fetched when " str x0, [0xd0000000]" is executing, but will be finally discarded some time after pc jumps to label 1?
I would have to read the relevant documentation.