I understand cortex-m55 default address map suggests the following possible address range where possibly Code can be fetched from
0x00000000-0x1FFFFFFF Code All accesses are performed on the Instruction Tightly Coupled Memory (ITCM) or Master-AXI (M-AXI) interface.
That suggests the bootcode (starting from reset vector where VTOR points to) and other initial code must be either placed with in this address range Or in the ITCM?
Hi sandtrip
I have moved your question to the Cortex-M forum, where someone may be able to help you.
Thanks
Oli from the Community team
Hi Sandtrip,
The default boot vector address (which is also the Vector Table offset address) is 0x00000000, which can be accessed by the either ITCM interface (if enabled) or via the M-AXI if the ITCM is disabled. There is a way to enable/disable the ITCM out of reset by tying INITTCMEN[0] to the appropriate value.
The Cortex-M55 has two input signals called, INITSVTOR and INITNSVTOR, that are used to set the vector table addresses in memory for Secure and Non-secure, respectively. INITSVTOR[31:7] is sampled at reset, and clearly must be stable at reset because it drives the very first step of processor initialization, which affects the address from where the processor loads the MSP value and PC value.
Please note both vector tables and the code need to be in Normal Memory as the Peripheral region is expected to be eXecute Never(XN).
Thanks,
Mahmood.
Thanks Mahmood.
I understand I have flexibility to put the vector within this range and configure the VTORS with input pins you mentioned.
But my question is there a restriction of where I can point to the VTORS? ie: it must be 0x0000000- 0x1ffffffff
>>vector tables and the code need to be in Normal Memory
How? At reset it is going to use default memory map. That means I must ensure the address is in range of default memory map
0x00000000-0x1FFFFFFF.
Can I place a piece of memory at 0x200000000 and point VTOR to it and expect the code to execute from there?
It can be placed anywhere in the memory map. As stated, both vector tables and the code need to be in Normal Memory as the Peripheral region is expected to be eXecute Never(XN), please see section B8.1 "System address map" of the Armv8-M ARM, which shows the default memory map view, so essentially the following address ranges can be used from reset to point to the VTORS.
0x00000000 - 0x1FFFFFFF0x20000000 - 0x3FFFFFFF0x60000000 - 0x9FFFFFFF