This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Prefetch abort in ARM Cortex R processor

Hello Experts,

Prefetch abort happens while accessing the co-processor instructions. How to debug the same.

To access the Cache Type Register, read CP15 with:

MRC p15, 0, <Rd>, c0, c0, 1 ; Returns cache details